first release copyright ? ixys corporation 2001 general description EVDD408 and evdd414 ixdd408 and ixdd414 gate driver ic evaluation boards the EVDD408/evdd414 evaluation boards are general- purpose circuit boards designed to simplify the evaluation of the ixys ixdd408 and ixdd414 gate drive ics, as well as to provide a building block for power circuit development. any of the four gate driver package types (so-8, dip 8, 5pin to-220 and the 5pin to-263) may be installed in the driver (the 5-pin to-263 is factory installed. the board enables the user to drive mosfets or igbts in the to-220, to-247, to-264 or sot-227 packages. the evaluation board design allows these mosfets to be attached to a heat sink, and in so doing the board assembly can be used as a ground referenced, low side power switch for both single-ended and push-pull configurations. the board layout for the gate driver in the to-220 and the to-263 packages (designator u1b), allows the ground tab to be soldered to the ground plane for cooling in high-power, high frequency applications with large mosfet devices. circuitry for the tri-state function is also included on the evaluation board. figure 1 is a photograph of the ixdd408/414 evaluation board loaded with an ixdd408yi to-263 driver and a sot- 227 mosfet. the low level inputs are shown on the left side of the board. control is a ttl high true input which controls the on or off state of the power switch q1, q2, or q3. enable is a low true input, which controls the tri-state output. vcc-in is the low voltage, (8-25v) power input, (see figure 3 below). figure 2 illustrates the mosfet mounting of a to-220, to- 247, or to-264 device. the mosfet is mounted on the back side of the pcb. a large through hole is provided so that the device can be attached to a heat sink. the sot-227 (shown in the photograph) is mounted in a similar manner. circuit operation the schematic diagram for the evaluation board is shown in figure 4. the control gate is applied to r6 then on the input pin 2 of the ic. this signal input is followed in time by the output pins 7 and 6. pins 1 and 8 are attached to +vcc via a de-coupling network comprised of r1, c1 and r2, c2. pins 4 and 5 are attached to the circuit ground plane. this is the preferred arrangement of the bypassing for the vcc input power. the enable pin 3 is attached to the drain of q4. this device is used to level translate and provide an invert function for the tri-state mode. the drain of q4 is also attached to the gate of the mosfet thru ra and da. in the tri-state mode the turn-off time of the power mosfet is determined by the time constant of the input gate capacitance c iss and the value of the resistor ra. see the ixdd408 and ixdd414 data sheets for additional information on this mode of operation. the u1 output is available at pins 7 and 6. these are attached to the mosfet via the two one-ohm resistors r4 and r5. the values of these resistors may be changed to optimize the performance of the specific device being driven. there are three test points on the board: control, gate and drain. these allow the user to easily attach an oscilloscope probe and the associated ground to the circuit to verify performance. input function control control input - 3v into 1k ohms gnd1 ground 1 enable low = true, high = tri-state mode gnd2 ground 2 vcc-in vcc input - 8v to 25v gnd 3 ground 3 the EVDD408/evdd414 are supplied with either ixdd408yi or ixdd414yi 5-pin to-263 devices installed. to use the evaluation board with a different package type, the installed device must be removed, and the new device installed in the appropriate location. figure 1 - EVDD408/evdd414 evaluation board sot-227 device installed for illustration purposes only figure 2 - EVDD408/evdd414 side view showing power device installed in a high-power configuration figure 3 - input pin-out table evaluation pcb kapton insulator to-220, to-247, to-264, or sot-227 heat sink part number installed device EVDD408 ixdd408yi 5-pin to-263 evdd414 ixdd414yi 5-pin to-263 ordering information
2 EVDD408/evdd414 figure 5 - ixdd408 14ns gate rise time, cl=2500pf figure 8 - ixdd414 11ns gate rise time cl=2500pf figure 6 - ixdd408 28ns gate rise time, cl=10000pf figure 4 - EVDD408/evdd414 schematic diagram ixys semiconductor gmbh edisonstrasse15 ; d-68623; lampertheim tel: +49-6206-503-0; fax: +49-6206-503627 e-mail: marcom@ixys.de ixys corporation 3540 bassett st; santa clara, ca 95054 tel: 408-982-0700; fax: 408-496-0670 e-mail: sales@ixys.net directed energy, inc. an ixys company 2401 research blvd. ste. 108 ft. collins, co 80526 tel: 970-493-1901; fax: 970-493-1903 e-mail: deiinfo@directedenergy.com doc #9200-0231 rev 1 notes: 1) the schematic shows all three output switches, however only one device can be installed at any one time. 2) the pin-out for device u1 reflects the 8-pin package types (pi and si). see the ixdd408 and ixdd414 data sheet for the pin-out of the to-220 and to-263 (yi and ci) packages. figure 7 - ixdd408 typical waveform f=500khz, cl=10000pf figure 10 - ixdd414 typical waveform f=500khz, cl=10000pf note: the capacitive loads used to generate the waveforms above are fixed value ceramic components. all measurements are made at the gate test point. figure 9 - ixdd414 18ns gate rise time cl=10000pf, r4 & r5=0 ?
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